An Ultra Energy Efficient Neuron enabled by Tunneling in Sub-threshold Regime on a Highly Manufacturable 32 nm SOI CMOS Technolog
This invention demonstrates an ultra-energy-efficient silicon neuron using band-to-band tunneling (BTBT) in a partially depleted silicon-on-insulator (PDSOI) MOSFET. The LIF neuron integrates charge via hole accumulation from BTBT, leaks via natural diffusion, and resets through a subthreshold circuit. Fabricated in 32nm technology, it offers exceptional area and energy benefits suitable for large-scale hardware SNN implementation.
Traditional hardware neurons are power-hungry and bulky, impeding scale-up. Advanced materials can be incompatible with existing processes. There is a need for an ultra-low-energy, CMOS-compatible neuron that mimics spiking behavior.
- Uses BTBT to induce hole storage in floating body
- Leaky integration by natural diffusion and subthreshold leakage
- Compact reset and spike generation via subthreshold circuits
- Achieves 3.2 fJ/spike energy efficiency in simulation and measurement
- Compatible with standard SOI CMOS fabrication
The neuron is implemented using a 32nm PDSOI MOSFET with a floating body and subthreshold biasing. A high drain bias enables BTBT-induced hole storage, simulating the integrate function. Leakiness is achieved via hole diffusion over the source-body junction. A compact control circuit detects firing thresholds and resets the neuron by grounding the body. Experimental validation confirms LIF behavior with 3.2 fJ/spike efficiency.
Enables greener AI by dramatically reducing energy per spike in neuromorphic hardware. Can democratize access to brain-like computing in embedded systems, assistive tech, and low-power AI devices.
- Neuromorphic processors
- Energy-efficient AI accelerators
- Edge AI for mobile and IoT
- Hardware research in neuroscience
- On-device cognition for robotics and wearables
- Neuromorphic Computing Systems
- On-chip Event Detection
- Predictive maintenance in industries