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Industrial Research And Consultancy Centre
Patent
Sub-Module for a Modular Multi-Level Converter
Abstract

This patent presents a solution for improving the efficiency and fault tolerance of half-bridge submodules in Modular Multilevel Converters (MMC) used in HVDC systems. The innovation involves replacing the lower switch of the half-bridge with a thyristor to reduce conduction losses and using a commutating capacitor branch to handle DC faults. This design aims to combine high efficiency with fault tolerance, making it suitable for HVDC applications. The proposed system achieves significant loss reduction and can be integrated with existing half-bridge submodules to optimize performance and device count.

Figure (1) (a) Thyristor bypassed half-bridge sub-module (TB-HBSM) (b) Thyristor bypassed fault tolerant half-bridge sub-module (TBFT-HBSM)

Problem Statement

High Voltage Direct Current (HVDC) transmission systems using Voltage Source Converters (VSC) face significant challenges, particularly in handling DC faults. In VSC-HVDC systems, when a DC fault occurs, the AC source feeds the fault through uncontrolled diodes, causing severe issues. This is especially problematic for MMC-HVDC systems with overhead lines that require fast fault interruption. Additionally, current IGBT-based submodules in these systems struggle with efficiency and cannot match the performance of Line Commutated Converter (LCC) technology due to high conduction losses and the inability to generate negative voltage.

Uniqueness of the Solution
  • Thyristor Bypassed Fault Tolerant Half-Bridge Submodule (TB-HBSM): This feature uses thyristors instead of IGBTs in the conduction path, resulting in lower conduction losses. 
  • Commutating Capacitor Branch: Generates a bipolar voltage to commutate thyristors and suppress DC side faults, ensuring reliable fault ride-through capability.. 
  • Reduced Switching Sorting Algorithm: Minimizes switching frequency and losses by applying sorting algorithm only to SMs needing state change, enhancing overall efficiency. 
  • Mixed Submodule Configuration: Combines TBFT-HBSMs and HBSMs, providing an optimized balance between efficiency and device count. 
  • Nearest Level Control (NLC): Suitable for converters with high levels, ensuring accurate operation without requiring high-frequency modulation. 
  • Snubber Circuit and Commutating Inductor: Limits dv/dt and di/dt stress across thyristors, improving reliability and performance of the converter.
Prototype Details

The provided patent text primarily focuses on the conceptual design, operational principles, and various circuit configurations of the Sub-Module (SM) for a Modular Multilevel Converter (MMC).

Current Status of Technology

A Hardware prototype has been developed, and all the simulations and hardware studies have been successfully performed.

Technology readiness level

5

Societal Impact

This technology can improve the reliability and efficiency of HVDC transmission systems, which are crucial for long-distance power transmission, integration of renewable energy sources, and grid stability. More efficient and reliable HVDC systems can lead to reduced energy waste, lower electricity costs, and a more sustainable energy infrastructure.

Applications or Domain

Power Transmission, Renewable Energy, High-Voltage Direct Current (HVDC) Systems, Flexible AC Transmission Systems (FACTS), Industrial Drives, Industrial Power Conversion

Geography of IP

Type of IP

Application Number

201821014637

Filing Date
Grant Number

473105

Grant Date
Assignee(s)
Indian Institute of Technology Bombay

IP Themes

**This IP is owned by IIT Bombay**