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Industrial Research And Consultancy Centre
Patent
Process and Temperature Tracking Bias Circuits for Realization of PT-Invariant Quantities in Analog Circuits
Abstract

The invention proposes a novel biasing technique that adjusts automatically to compensate for process and temperature variations, thereby stabilizing resistance and current references on-chip. This approach aims to eliminate the need for external components and digital calibration, reducing power consumption and enhancing reliability in analog circuit designs.

Uniqueness of the Solution
  • Utilizes process and temperature tracking bias circuits for maintaining constant on-chip resistance without external components. 
  • Achieves PT-invariant quantities such as stable transconductance and PTAT current references across varying conditions. 
  • Eliminates the need for costly digital calibration methods and external precision resistors. 
  • Enhances analog circuit reliability by minimizing variability in resistors and current sources across different process corners and temperature ranges.
  • Utilizes process and temperature tracking bias circuits for maintaining constant on-chip resistance without external components. 
  • Achieves PT-invariant quantities such as stable transconductance and PTAT current references across varying conditions. 
  • Eliminates the need for costly digital calibration methods and external precision resistors. 
  • Enhances analog circuit reliability by minimizing variability in resistors and current sources across different process corners and temperature ranges.
Prototype Details

This novel circuit is fabricated and tested on the silicon chip technology and evaluated for its basic concept, and its formulation is being confirmed to ensure realistic end-use application.

Current Status of Technology

The technology is currently being tested and evaluated for its basic concept, and its formulation is being confirmed to ensure realistic end-use application.

Technology readiness level

4

Societal Impact
  • Reduces electronic waste by promoting more reliable and durable analog circuits with longer operational lifespans. 
  • Lowers power consumption in electronic devices by eliminating the need for energy-intensive calibration techniques. 
  • Facilitates cost-effective production of electronic devices by reducing reliance on external components and calibration processes.
Relevant Industries, Domains and Applications

semiconductors, consumer electronics, telecommunication, automotive electronics

Applications or Domain
  • Analog integrated circuits for signal processing and filtering applications. 
  • Sensor interfaces require precise and stable current references. 
  • Power management circuits in portable electronics for efficient energy utilization.

Geography of IP

Type of IP

Application Number

73/MUM/2012

Filing Date
Grant Number

410890

Grant Date
Assignee(s)
Indian Institute of Technology Bombay

IP Themes