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Industrial Research And Consultancy Centre
Patent
Method of Fabricating Non-Volatile Memory Device
Abstract

This invention provides a method for fabricating a non-volatile memory (NVM) device. The method involves providing a substrate, growing a layer of tunnelling oxide on it, and then growing Tin (Sn) nanocrystals on the tunnelling oxide layer. These nanocrystals are encapsulated with a blocking oxide layer, and a metal gate contact is formed on top. This innovative approach aims to address the limitations of traditional non-volatile flash memories by using Sn nanocrystals, which offer higher charge retention and larger memory windows, making the NVM devices more efficient and reliable.

Figure (1) Scanning electron microscope (SEM) images of Sn nanocrystals grown on various surfaces, according to an embodiment as disclosed herein; (2) It is scanning electron microscope (SEM) images of Sn nanocrystals grown on HfO2 for different durations and at two different growth temperatures, according to an embodiment as disclosed herein.

Problem Statement

Non-volatile memory (NVM) devices are crucial in a wide range of applications, including consumer electronics, automotive components, computer architecture, and communication systems. Traditional non-volatile flash memories utilize a polysilicon floating-gate as a charge storage layer. However, these memories face limitations due to physical constraints. Emerging alternatives, such as semiconducting and metal nanocrystals, offer better performance but come with their own set of challenges. Specifically, the development of metal-nanocrystal-based NVMs is hindered by the choice of metals, high-temperature annealing requirements, and compatibility issues with CMOS processing.

Uniqueness of the Solution
  • Utilization of Sn Nanocrystals: Provides higher reliability of charge storage 
  • Atomic Layer Deposition (ALD): Ensures a uniform and precise layer of tunnelling oxide 
  • Encapsulation with Blocking Oxide: Protects the nanocrystals and enhances device performance 
  • Metal Gate Contact: Formed using platinum (Pt) capped with aluminium (Al) for improved conductivity 
  • CMOS Compatibility: Ensures the process is compatible with existing semiconductor manufacturing techniques
Prototype Details

The prototype describes a method for fabricating a non-volatile memory device using Sn nanocrystals grown on a tunnelling oxide layer, encapsulated with a blocking oxide, and topped with a platinum-aluminium metal gate. This structure ensures improved charge retention and CMOS compatibility.

Current Status of Technology

The patent has been granted and is currently available for licensing

Technology readiness level

4

Societal Impact

The development of more reliable and efficient non-volatile memory devices will significantly enhance the performance and lifespan of electronic devices. This can lead to more durable consumer electronics, advanced automotive components, and improved communication systems.

Applications or Domain
  • Consumer Electronics: Enhances the performance and durability of devices like smartphones, tablets, and laptops 
  • Automotive Industry: Improves the reliability and efficiency of electronic components in vehicles 
  • Computer Architecture: Supports advanced data storage solutions in computing systems 
  • Communication Systems: Enhances the performance of devices used in communication infrastructure 
  • Semiconductor Manufacturing: Facilitates the production of advanced memory devices

Geography of IP

Type of IP

Application Number

201721028302

Filing Date
Grant Number

502049

Grant Date
Assignee(s)
Indian Institute of Technology Bombay
**This IP is owned by IIT Bombay**