Ultra-low Power Charge Balancing and Low Noise Stimulator using Adiabatic and Self-clocking techniques
The present invention proposes an ultra-low power charge balancing and low noise stimulator in accordance with an aspect of the present invention. Switch capacitor based architecture utilizes adiabatic charging and residual charge recycling through electrodes, along with self-clocking in a single hardware configuration. The system is capable of producing anodic-first as well as cathodic-first stimulation signals with or without inter-phase delay through appropriate software changes. The present stimulator is capable of generating charge balanced bipolar stimulation signals for neuronal tissues at very low power budget (3.75RW quiescent power approximately) and at much lower noise (<50 mV).