Capacitively Coupled Current Mode Clock Distribution Network
The present disclosure describes capacitively coupled clock distribution network (CCCDN) which reduces the clock skew and power consumption of the clock distribution network. A novel delay line called process invariant delay line (PIDL) which is less variant to process has been employed as the receiver for the clock distribution as a result of which skew is reduced.


Category
ICTFaculty Associated
Inventor(s)
- Maryam Shojaei Baghini, Dyuthi Kishan, Dinesh K Sharma